Solid state switching circuits

ABSTRACT

A solid state switching circuit including a diode bridge network is operated by DC control currents. One pair of opposite points of the bridge network is connected in the line to be switched. The other pair of opposite points of the bridge network is connected to a control circuit which produces conduction or nonconduction simultaneously in the diodes. Unidirectional currents from the control circuit, flowing in the bridge circuit, flow in opposite directions in both the input and output circuit of the line to be switched and are balanced out.

United States Patent 3,183,373 5/1965 Sakurai 307/256 3,449,596 6/1969 Milberger et a1. 307/257 3,127,564 3/1964 Giger 307/257X Primary Examiner-Donald D. Forrer Assistant Examiner-B. P. Davis Attorneys-W. J. Shanley, J r., Thomas A. Briody, Marvin Snyder, Oscar B. Waddell and Frank L. Neuhauser ABSTRACT: A solid state switching circuit including a diode bridge network is operated by DC control currents. One pair of opposite points of the bridge network is connected in the line to be switched. The other pair of opposite points of the bridge network is connected to a control circuit which produces conduction or nonconduction simultaneously in the diodes. Unidirectional currents from the control circuit, flowing in the bridge circuit, flow in opposite directions in both the input and output circuit of the line to be switched and are balanced out.

[72] Inventor Max 1-1. Diehl Manlius, N.Y. [2]] Appl. No. 723,024 [22] Filed Apr. 22, 1968 [45] Patented Apr. 6, 1971 [73] Assignee General Electric Company [54] SOLID STATE SWITCHING CIRCUITS 6 Claims, 4 Drawing Figs.

[52] U.S. Cl. 307/257, 307/321 [51] Int. Cl 1103b 17/00 [50] Field ofSearch 307/254, 256, 257, 321; 328/99, 208; 323/75 (E) [56] References Cited UNITED STATES PATENTS 3,179,817 4/1965 Bounsall 307/254 D I/ p 4 INVEMTOW: MAM M. DIEHL,

BACKGROUND OF THE INVENTION Solid state switching circuits are used in a number of applications; for example, for cross point switching of any of a plurality of video source busses to any of utilization busses. In certain applications solid state switching circuits have replaced mechanical switches which, in general, are bulky, costly, lack sufficient reliability, and have contacts which are subject to contamination. Even though such solid state switching circuits have overcome certain shortcomings of mechanical switches, they also have had some shortcomings, such as lack of sufficient isolation between the input and output terminals thereof and also the appearance of control cur rents at the input and output terminals of the switch circuits when such circuits are actuated by control currents.

The present invention is directed to overcoming such disadvantages in the prior art solid state switches.

SUMMARY OF INVENTION In accordance with an illustrative embodiment of the present invention there is provided a bridge network of two pairs of diodes, each pair of diodes connected in series between an input and an output terminal. One pair of diodes has cathodes connected in common and the other pair of diodes has anodes connected in common. A pair of biasing networks is provided across a source of voltage, each having a point thereof connected to a respective common electrode point of the pairs of diodes. The value of an impedance in each of the networks is dynamically changed to change the biasing of the diodes and hence the impedance the diodes present between input and output terminals. The circuit enables high isolation and low insertion loss to be achieved and is so constituted that diode control currents are balanced out in the input and the output of the circuit.

The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, together with further advantages thereof may best be understood by reference to the following description taken in connection with the accompanying drawings in which:

FIG. l is a schematic diagram of one embodiment of the switching circuit of my invention.

FIG. 2 is an equivalent circuit of one-half of the diode bridge circuit of FIG. 11 useful in explaining the operation thereof.

H6. 3 is a schematic diagram of another embodiment of the switching circuit of my invention.

FIG. ll is an equivalent circuit of one-half of the diode bridge circuit of FIG. 3 useful in explaining the operation thereof.

Referring now to FIG. ll, there is shown an illustrative embodiment of the switching system of the present invention. In this figure is shown a pair of input terminals and ill and a pair of output terminals l2 and 13. Input terminal ill and output terminal 23 are connected to ground. A load resistance M is provided across the input terminals and another load resistance i5 is provided across the output terminals. A bridge circuit lti including four diodes D,, D D and D, is connected between the input terminal l0 and output terminal 112. Diodes or unilaterally conducting devices D, and D are connected in series circuit with their cathodes in common between the input terminal 110 and the output terminal 112. Diodes D and D, are connected in series circuit with their anodes in common between the input terminal iltl and the output terminal l2.

Control voltages for controlling the conduction of the diodes D,, D D and D, are provided by circuits associated with NPN transistor Q, and PNP transistor 0 Energization for the transistors Q, and Q and their control circuits is provided by a source of unidirectional potential having a positive terminal 21, a negative terminal 22, and a terminal 23 connected to ground at an intermediate potential point. In addition, there is provided on the source 21) a potential point 2d intermediate the positive potential point 2i and the intermediate point 23, and another potential point 25' intermediate in pptential between the negative potential point 22 and the intermediate potential point 23.

The cathodes of D, and D, are connected through a biasing or load resistor M) to the negative potential point 22 and also to the collector of PNP transistor 0,. The emitter of transistor 0, is connected to the positive point 21. The base of transistor 0, is connected through a resistance 31 to the positive potential point 2i and also to the pole 1'52 of a single-pole doublethrow switch 33, one contact M of which is connected to the positive potential point 211 and the other contact 35 of which is connected to the potential point 24.

The anodes of diodes D and D, are connected through a biasing or or load resistor 1% to the positive potential point 2i and also to the collector of NPN transistor 0,. The emitter of transistor 0, is connected to the negative potential point 22. The base of transistor 0, is connected through a load resistance 37 to the negative point 22 and also to the pole 38 of a single-pole double-throw switch 39, one contact all of which is connected to the negative potential point 22 and the other contact M) of which is connected to the negative potential point 25. The contacts 35 and so are referred to as OFF contacts and the contacts 34 and iii are referred to as the ON contacts. The poles 32 and 3 8 of the switches are ganged together.

When the poles of the switches 33 and 39 are in the ON position, control voltages are provided to the bridge circuit lb, thereby rendering all of the diodes D,, D D and D, conductive to provide a low impedance path from input terminal it) to output terminal 12. When the poles of the switches are contacting the OFF" contacts thereof, control voltages are provided to the bridge circuit in which biases the diodes D,, D D and D, nonconductive, thereby providing isolation of input terminal it) from output terminal l2.

When switch 33 and switch 39 are :in the OFF position, the emitter-base circuit of transistor Q, is biased conductive and similarly the emitter-base circuit of transistor Q, is biased conductive. Accordingly, as the saturation resistances of transistors Q, and Q, are quite low in relation to the size of resistances 3b and 30, the anodes of diodes D and D, are biased negatively through the collector-to-base circuit of transistor Q, from negative potential point 22 and the cathodes of diodes D and D, are biased positively through the collector-to-base circuit of transistor 0, from positive potential point 211. Thus, each of diodes D,, D D and D, are reversely biased in respect to the intermediate potential point 23. Consequently, a high impedance is provided between the input terminal ill and the output terminal 12.

FIG. 2 is an equivalent circuit of a portion of the schematic circuit of FIG. l showing the impedance presented between the input terminal lit) and the output. terminal 12 when the diodes D, and D are reversely biased. Elements of FIG. 2 identical with elements of FIG. 1 are designated by the same reference symbol. The C represents the capacitance of the reversely biased diode D, and the C represents the capacitance of the reversely biased diode D R represents the saturation resistance of the transistor 0 Accordingly, it is seen that when the diodes D, and D are reversely biased, the signal appearing across resistor M is lowered due to the shunt circuit presented by the series impedance of C and R As the capacitive reactance of the small capacitance C is large in relation to the saturation resistance R,, only a very small portion of the signal appearing across resistor it appears across R Similarly, the small signal appearing across 12,, is further lowered due to the shunt circuit presented by the series impedance of C and resistance l5. Conventional diode elements available for use in the bridge network have parameters which enable a high degree of isolation to be achieved between input terminal l0 and output terminal 112. An equivalent circuit could be drawn for the diodes D, and D, similar to the equivalent circuit including diodes D, and D When the switches 33 and 39 are in the ON" position the base of transistor Q, is connected to the negative potential point 22 and the base of transistor Q, is connected to the positive potential point 21. Such potentials applied to the transistors Q, and Q, render the transistors nonconductive, that is, conduction through the transistors is blocked. Accordingly, the cathodes of diodes D, and D are connected through load resistor 30 to the negative potential point 22 and the anodes of diodes D and D, are connected through load resistor 36 to the positive potential point 21, thereby biasing diodes D,, D D and D, into conduction. Current flows from the positive terminal 21 branching through diodes D and D, into input resistance 14 and output resistance to ground. Also, currents flow in the opposite direction from the terminals I1 and 13 throughthe resistors 14 and 15, diodes D, and D and resistor 30 to the negative potential point 22. The impedances of the branch circuits described, in which unidirectional currents flow from the positive point 21 through resistance 36, the diodes D and D,, and resistances l4 and 15 to ground, and from ground through resistances I4 and 15, diodes D,, and D and resistance 30 to a negative potential point 22, are proportioned such that the current flow in the input resistance '14 and in the output resistance 15, resulting from the combined currents, is balanced out. Such an arrangement eliminates control currents from the circuits being switched. The circuit shown in FIG. 1 would be suitable in switching systems in which large numbers of sources of signals are arranged to be connected simultaneously to a large number of outputs; for example, in video switching networks. Note that in the circuit shown in FIG. 1, to produce the nonconductive condition in the diodes of the bridge network, transistors Q, and Q, have to be rendered conductive. A large number of units of a kind set forth in FIG. 1 would be used and would connect the cross points of the input and output lines of the system. Often, only a few of the input lines would be connected to a few of the output lines. Under such circumstances, it would be desirable that the transistors in the control portion of the switch associated with the diodes which are nonconducting, also be nonconductive.

FIG. 3 shows a circuit in which the transistors Q and Q, in the control circuit are conductive when the diodes are conductive and vice versa. Such an arrangement economizes on the use of electrical power. In this FIG., the elements corresponding to the elements of FIG. 1 are similarly designated. The utilization circuit of FIG. I is the same as FIG. 3 and includes a pair of input terminals 10 and 11 across which is connected a load resistor 14, and a pair of output terminals 12 and 13, across which is also connected another load resistor 15. Terminals 11 and 13 are connected to ground. The ground terminals are connected to the intermediate point 23 on the unidirectional voltage source and the bridge circuit 16 consisting of diodes D,, D D and D, is connected in the line between input terminal 10 and output terminal 12. In addition, a pair of capacitors l7 and 18 are connected in series between the common cathodes and common anodes of the diodes D,, D D and D,, with the common terminal of capacitors 17 and 18 connected to ground, to provide further isolation of the input terminals 10 and 11 from the output terminals l2 and 13 when diodes D,, D D and D, are nonconducting. Capacitors 17 and 18 lower the high frequency shunting impedance across input terminals 10 and 11 when the diodes D,, D D and D, are nonconductive thereby improving high frequency isolation.

The cathodes of diodes D, and D, are connected through a voltage dropping resistor 50 to the positive potential point 21 and also through a resistor 51 to the collector of NPN transistor 0,. The emitter of transistor 0,, is connected to the negative potential point 22. The base of the transistor 0, is connected through a current limiting resistor 52 to the pole 53 of a single-pole double-throw switch 54, one contact 55 of which, designated the OFF contact, is connected to the negative potential point 22. The other contact 56 of switch 54, designated the ON contact, is connected to the intermediate potential point 25. The anodes of diodes D, and D, are connected through a voltage dividing resistor 57 to the negative potential point 22 and also connected through a resistor 58 to the collector of PNP transistor 04, the emitter of which is connected to the positive potential point 21. The base of the transistor Q, is connected through a biasing network comprising a resistor 59 shunted by a capacitor 60 to the collector of Q With switch 54 in the OFF position, the base of transistor Q, is connected to the same potential point as the emitter so that the transistor 0,, is biased nonconductive. Accordingly, the cathodes of diodes of D, and D are connected through the resistor 50 to the positive potential point and hence biased nonconductive. The base of the transistor Q, is also connected through resistors 59, 51 and 50 to the positive point 21 to which the emitter thereof is also connected and, hence, transistor 0, is also biased nonconductive. Accordingly, diodes D and D, are nonconductive as the anodes of diodes D and D, are at the potential of point 21. Thus, the input terminals 10 and 11 are isolated from the output terminals 12 and 13.

FIG. 4 is an equivalent circuit of a portion of the schematic circuit of FIG. 3 showing the impedance presented between the input terminal 10 and the output terminal 12 when the diodes D, and D, are reversely biased. Elements of FIG. 4 identical with elements of FIG. 3 are designated by the same reference symbol. The element C is the capacitance of the reversely biased diode D, and the element C is the capacitance of the reversely biased diode D R represents the resistive impedance to ground in the collector circuit of transistor Q when nonconductive, i.e. resistor 50 of FIG. 3. C represents the capacitance of capacitor 17 and provides an impedance path in shunt with resistance R. The impedance of the parallel combination of R and C is low in comparison to impedance of C of reversely biased diode D,. Thus, a very small portion of the signal appearing across input terminals 10 and 11 appears across the parallel combination of resistor R and capacitor C. Such signal is further attenuated at the output terminals by the series combination of the capacitance C of the reversely biased diode D in series with the output resistor 15.

To actuate the control circuit, that is to connect the input terminal 10 to the output terminal 12, the pole of the switch is moved to engage the ON contact 56. Such action drives the NPN transistor 0,, into conduction and essentially provides a voltage divider network comprising resistors 50 and 51 and the saturation resistance of the transistor 0 in series across the source 20. The resistances of the divider network are proportioned such that the potential at the junction of resistors 50 and 51 is negative with respect to ground. Accordingly, the diodes D, and D, become forwardly biased and conduct. Lowering the potential of the collector of Q lowers the potential of the base of the PNP transistor 0,, thereby driving transistor Q, into conduction and resulting in saturation current flowing from the emitter to the collector thereof. In effect, the saturation resistance of Q, and the resistors 57 and 58 are connected in series across the positive and negative potential points 21 and 22 of the source 20. The resistors of such series network are selected so that the potential at the junction of resistors 57 and 58 is positive with respect to ground. Accordingly, diodes D and D, are forwardly biased and conduct. With the diodes of the bridge network conductive, current flows from the positive potential point 21 through the collector circuit of Q, and through the resistor 58, and then divides through diodes D and D,. The portion of the current through D, flows through input resistor 14 to ground. The portion of the current that flows through D, passes through the output resistor 15 to ground. Similarly, current flows in the opposite direction from ground through the input resistor 14, through diode D, and combined with current that flows from ground through output resistor 15 and diode D The combined current flows through resistor 51 and through the collectoremitter circuit of Q, to the negative potential point 22. The

parameters of the circuit are arranged so that the currents that flow through the input resistor 14 and the output resistor 15 are balanced; that is, the current flowing in one direction is balanced to nullify the current flowing in the opposite direction through each of resistors 14 and i5.

While the invention has been described in specific embodiments, it will be appreciated that many modifications may be made by those skilled in the art, and I intend by the appended claims to cover all such modifications and changes as fall within the true spirit and scope of the invention.

I claim:

1. A switching circuit comprising:

an input terminal;

an output terminal;

a first resistor connected between said input terminal and ground;

a second resistor connected between said output terminal and ground;

first and second pairs of unilaterally conducting devices, each of said devices having an anode and a cathode and displaying an impedance of low value when conducting and an impedance of high value when non conducting, the devices in one of said pairs being connected in series with the cathodes thereof joined at a first common terminal between said input and said output terminals and the devices in the other of said pairs being connected in series with the anodes thereof joined at a second common terminal between said input and said output terminals;

a source of potential having a positive and a negative potential point, and an intermediate potential point connected to ground;

a first circuit including a fixed impedance element and a first controllable impedance element connected in series across said positive and negative points with the junction thereof connected to the cathodes of said one pair of unilaterally conducting devices;

a second circuit including a fixed impedance element and a second controllable impedance element connected in series across said positive and negative points with the junction thereof connected to the anodes of said other pair of unilaterally conducting devices; and

means for conjointly increasing or decreasing the impedances of said first and second variable impedance elements to increase or decrease, respectively, the values of impedance of each of said unilaterally conducting devices.

2. The switching circuit of claim 1 including first capacitance means coupling said first common terminal to ground, and second capacitance means coupling said second common terminal to ground.

3. The switching circuit of claim 1 including means coupling a control potential to a control electrode of said first controllable impedance element, and means coupling the output of said first controllable impedance element to a control electrode of said second controllable impedance element.

4. The switching circuit of claim, 3 including first capacitance means coupling said first common terminal to ground, and second capacitance means coupling said second common terminal to ground.

5. A switching circuit comprising:

an input terminal;

an output terminal;

a first resistor connected between said input terminal and ground;

a second resistor connected between said output terminal and ground;

first and second pairs of diodes, each of said diodes having an anode and a cathode, the diodes in one of said pairs being connected in series with the cathodes thereof joined at a first common terminal between said input and said output terminals and the diodes in the other of said pairs being connected in series with the anodes thereof joined at a second common terminal between said input and said output terminals; a source of po ential having a positive and a negative potential point, and an intermediate potential point connected to ground;

a first circuit including a first transistor and a first resistor connected in series with the emitter and collector electrodes of said first transistor between said positive and negative potential points, the collector electrode of said first transistor being connected to the common cathodes of one of said pairs of diodes;

a second circuit including a second transistor and a second resistor connected in series with the emitter and collector electrodes of said second transistor between said positive and negative potential points, the collector electrode of said second transistor being connected to the common anodes of the other of said pairs of diodes;

means coupling the collector electrode of said first transistor to the base electrode of said second transistor; and

means selectively coupling a control potential to the base electrode of said first transistor, said control potential at one amplitude level producing conduction in said first transistor so as to bias said diodles nonconductive and, at another amplitude level, rendering said first transistor nonconductive so as to bias said diodes conductive to establish a conductive path between said input terminal and said output terminal.

6. The switching circuit of claim 5 including first capacitance means coupling said first common terminal to ground, and second capacitance means coupling said second common terminal to ground. 

1. A switching circuit comprising: an input terminal; an output terminal; a first resistor connected between said input terminal and ground; a second resistor connected between said output terminal and ground; first and second pairs of unilaterally conducting devices, each of said devices having an anode and a cathode and displaying an impedance of low value when conducting and an impedance of high value when non conducting, the devices in one of said pairs being cOnnected in series with the cathodes thereof joined at a first common terminal between said input and said output terminals and the devices in the other of said pairs being connected in series with the anodes thereof joined at a second common terminal between said input and said output terminals; a source of potential having a positive and a negative potential point, and an intermediate potential point connected to ground; a first circuit including a fixed impedance element and a first controllable impedance element connected in series across said positive and negative points with the junction thereof connected to the cathodes of said one pair of unilaterally conducting devices; a second circuit including a fixed impedance element and a second controllable impedance element connected in series across said positive and negative points with the junction thereof connected to the anodes of said other pair of unilaterally conducting devices; and means for conjointly increasing or decreasing the impedances of said first and second variable impedance elements to increase or decrease, respectively, the values of impedance of each of said unilaterally conducting devices.
 2. The switching circuit of claim 1 including first capacitance means coupling said first common terminal to ground, and second capacitance means coupling said second common terminal to ground.
 3. The switching circuit of claim 1 including means coupling a control potential to a control electrode of said first controllable impedance element, and means coupling the output of said first controllable impedance element to a control electrode of said second controllable impedance element.
 4. The switching circuit of claim 3 including first capacitance means coupling said first common terminal to ground, and second capacitance means coupling said second common terminal to ground.
 5. A switching circuit comprising: an input terminal; an output terminal; a first resistor connected between said input terminal and ground; a second resistor connected between said output terminal and ground; first and second pairs of diodes, each of said diodes having an anode and a cathode, the diodes in one of said pairs being connected in series with the cathodes thereof joined at a first common terminal between said input and said output terminals and the diodes in the other of said pairs being connected in series with the anodes thereof joined at a second common terminal between said input and said output terminals; a source of potential having a positive and a negative potential point, and an intermediate potential point connected to ground; a first circuit including a first transistor and a first resistor connected in series with the emitter and collector electrodes of said first transistor between said positive and negative potential points, the collector electrode of said first transistor being connected to the common cathodes of one of said pairs of diodes; a second circuit including a second transistor and a second resistor connected in series with the emitter and collector electrodes of said second transistor between said positive and negative potential points, the collector electrode of said second transistor being connected to the common anodes of the other of said pairs of diodes; means coupling the collector electrode of said first transistor to the base electrode of said second transistor; and means selectively coupling a control potential to the base electrode of said first transistor, said control potential at one amplitude level producing conduction in said first transistor so as to bias said diodes nonconductive and, at another amplitude level, rendering said first transistor nonconductive so as to bias said diodes conductive to establish a conductive path between said input terminal and said output terminal.
 6. The switching circuit of claim 5 including first capacitance means coupling said first common terminal to grouNd, and second capacitance means coupling said second common terminal to ground. 